The present invention relates to an apparatus for detecting when a logic device is required to perform an operation, and more particularly to an apparatus for detecting when a parameter of a signal sent to a logic device falls outside predefined parametric ranges.
It has become increasingly important to provide computer components which consume less energy. Consequently, many logic devices (e.g. PALs and EPROMs) have been developed which may be "powered-down" when they are not being used to perform computational operations. Specifically, logic devices have been developed which assume either an idle mode or an active mode responsive to an activation signal. Such logic devices are referred to herein as dual-mode logic devices. In the idle mode, dual-mode logic devices consume little or no power, but are incapable of performing operations. In the active mode, logic devices consume more power and can perform operations.
In order to operate efficiently, dual-mode logic devices must be able to sense when they are required to perform an operation, assume the active mode, and perform the required operation, without imposing any timing delays for the activation process.
One approach to dual-mode logic device design is to provide an additional I/O pin on the semiconductor on which the dual-mode logic device resides for receiving the "wake-up" or activation signal. This external activation approach has the disadvantage that it requires additional external pins and communication lines. The approach has the further disadvantage that additional circuitry must be added to the components which call the dual-mode logic device to enable such components to send the activation signal required to activate the dual-mode logic device.
Another known approach is to provide edge-detecting activation circuitry which detects when the dual-mode logic device is receiving information which it must process by sensing the occurrence of an edge on an input line to the logic device. When an edge is detected on an input line to the logic device, edge-detecting activation circuitry causes the dual-mode logic device to assume the active mode.
The edge-detection approach avoids the need for external activation lines, but requires the use of relatively complex edge-detection circuitry. The resulting increase in circuit complexity often requires a larger die size to be used in the chip manufacturing process, making the manufacture of chips which embody dual-mode logic devices more expensive.
In light of the foregoing, it is clearly desirable to provide a circuit for detecting when a dual-mode logic device is required to perform an operation. It is further desirable to provide a circuit for causing a dual-mode logic device to assume the active mode and perform an operation without imposing any activation-related timing delays. It is also clearly desirable to provide circuitry to activate a dual-mode logic device that does not require any additional external communication lines. It is further desirable to provide a circuit for activating a dual-mode logic device that requires less complex circuitry than current edge-detection circuits.